what happens???

Hi, In a CMOS inverter what happens to VTC if input transition is faster ???????why????

Asked By: ram_vlsi
On: Jul 11, 2004 6:00:45 AM

Comments(7)

well with faster switching times the only thing that comes to my mind is the power dissipation. the short circuit current will reduce considerebly(thus reducing the power consumption) since the power dissipation is directly proportinal to the rise and fall time.

Comment By: rskurane
On: Jun 6, 2005 8:15:10 PM

Hi ram Can u please provide the link for the lecture.I am sorry that I am unable to figure out the relationship between rise/fall times and VTC.

Comment By: sand
On: Jul 21, 2004 1:54:26 AM

Hi sand, I have read in some lecture ( from web ) that VTC curve shifts right if input rise/fall times become sharp. Can anyone explain why???? ThanQ in advance RAM :-)

Comment By: ram_vlsi
On: Jul 14, 2004 1:26:23 AM

I think VTC has got nothing to do with timing stuff. VTC is nothing but a Vin - Vout plot. Where does time come into picture ???

Comment By: sand
On: Jul 14, 2004 1:20:17 AM

1:when input to output transition is faster then noise margin increases because slope increases ans this reduce the tansition region ther by consequently increasing noise margins

Comment By: sampathkumar
On: Jul 12, 2004 8:39:52 AM

Hi gurukumar, I mean Voltage Transfer Characteristic........... will there be any change in VTC if input rise/fall time increases............... I hope I am clear... bye RAM :-)

Comment By: ram_vlsi
On: Jul 12, 2004 2:15:20 AM

what is VTC? Is it some rise time or fall time u r talking about??

Comment By: gurukumar
On: Jul 12, 2004 12:47:06 AM

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