Regarding violations in Timing Analysis

Hi Friends, This was a interview question for me. There are 100 setup and 100 hold violations in ur design. In order to have a successful chip which one do u consider first and why ? I answered him saying that I would first take up setup time, coz if I clear these violations then I am sure that the chip will function for the desired frequency at least. After this I would take up hold time vioaltions and then clear it. If the above is wrong then please tell me why it is wrong and which one of the violations i.e either setup or hold shud be considered first. Thanks in Advance, Kumar

Asked By: prasanna_ps
On: Oct 18, 2005 2:14:36 AM

Comments(8)

looks like some problem in the website link ... Please find the link here.. http://www.vlsi-expert.com/2012/11/fixing-setup-and-hold-violation-static.html

Comment By: birdy123
On: Nov 18, 2012 11:51:46 PM

Hi, As such there is no direct way to fix these violations.. First you should understand the reason of these violations and then as per the design you can fix them. Regarding which one suppose to fix first - Hold suppose to fix first and then setup. Detail analysis and the reason of this you can find in various website.. But below one is good one.. <a href="http://www.vlsi-expert.com/2012/11/fixing-setup-and-hold-violation-static.html"> How to fix setup and hold violation </a> Please let me know in case you have further questions

Comment By: birdy123
On: Nov 18, 2012 11:48:26 PM

Basically, Just wanted to add here. You can see a lot of chips/microprocessors taped out with setup violations but getting rid of each hold violation is absolutely important. -Gaurav

Comment By: gaurav_gks
On: Dec 20, 2005 10:03:54 PM

setup time violations can be taken care of by reducing the clock frequency. but the hold time violation is due to unnecessary delays on the clock tree.(unwanted clock skew due to bad clock tree design or place and route).therefore removing the hold time violation is a preferred option. this might as well require some changes in the design netlist...

Comment By: vsravanth
On: Dec 16, 2005 11:39:16 AM

Hi, How can avoid Hold and Setup Violation? Regards, Arun

Comment By: buddy72
On: Oct 26, 2005 7:49:42 AM

hi sarvanan, Even I have some doubts as why we need to fix hold time violations first. Cud u please explain this in detail ? Regards, Kumar

Comment By: prasanna_ps
On: Oct 19, 2005 9:58:35 AM

hi saravanan, Why you say that we have to fix holdtime voilations .Can you explain me liitle bit in detail ? Regards srinia

Comment By: srinivasb
On: Oct 18, 2005 8:48:49 AM

hi kumar, first hold time violation should be sorted out. even if u satify setup time requirements for a particular frequency, ur system will land up in metastable state if hold is not met. This hold time should be checked at every flop stage for proper operation of the ckt.

Comment By: saravanan17
On: Oct 18, 2005 6:28:56 AM

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