some problems plz help!


can anyone plz help me by answering my queries! 1.how can we get a 3/2 clock,ie a clock output with high for 1 and a half cycle of input clock and low for one clock cycle of input? 2.why do constant current source made from BJT have high gain? 3.why is offset voltage present in saturated BJT and not in MOSFET? 4.how does putting a source follower as output stage in opamp help in avoiding loss of gain when a low value load resistor is connected to amplifier? 5.in what cases do v need to double clock a signal before presenting to a synchronous state machine? 6.why do v need to put a gate resistance in mosfet circuits? 7.you have a driver that derives a long signal & connects to an input device. at the input device ther is either overshoot,undershoot or signal threshold violations,what can be done to correct this problem? THANX IN ADVANCE!

Asked By: richie
On: Jul 6, 2005 3:45:17 PM

Comments(4)



for increasing gate resistace v need to increase channel width so that flow of cureent increses so speed increases and perfomace increases but power dissipation is due to more wider width capacitance increases Pd=C (Vdd)^2 f
For Q7) Put a source resistance that matches the characteristic impedance.
hi venkateshr! thanx a lot 4 your help! can u plz kindly suggest me a good book in digital and is there any book available in which i can get questions on cmos logic gates and other applications? i have been refering to morris mano 4 digital and sedra n smith 4 electronics.
hi richie, barrels and tonnes of questions .seems to be "richie rich" in question bank.u have to take up a book and read all the basic stuff this is my frendly note for you. 2.current gain of BJT is more than MOSFET bu i donno the meaning of current source having gain . 4. if there is considerable op resistance the voltage at the load wont be as expected so we connect a source follower which is unity gain with high ip impedance and low op impedance ckt.e.g npn transistor with load at the emitter and collector to vcc 6.generally u need not connect a resistor but if u want to connect the gate to op and to the ip signal u need to connect the resistor.u can do the mos model analysis for that to obtain the gain of the amplifier. bye
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