optimize delay

hi all.. how do we solve this?? let A and B be 2 i/p's of a nand gate. A arrives later than B at the nand gate. to optimize delay, if the 2 series NMOS i/p's which one would u place near the input?? is it B bcos it has higher transition?? thx for ur solns in advance.. tc ajay

Asked By: ajay_hk
On: May 31, 2005 5:09:56 PM

Comments(1)

hi ajay, let me tell you one thing.this is a normal question asked freq. A shd be placed near the op.this is called ip reordering which is done for faster performance.A shd be kept so that it will discharge the cap. only at the op else if B was there then A has to discharge both op and node cap also.morever there would be body effect also in the first nmos.refer rabaey or any other book.

Comment By: venkateshr
On: Jun 1, 2005 1:22:43 AM

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