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<-- Previous Next -- > TOPIC: Pull Up transistor
Posted by: shantha_rang     2/17/2005 3:19:50 PM     Category: CMOS
Questions posted: 5         Comments Posted: 2
What is the meaning of Pull up and pull down transistor with reference to PMOS and NMOS ?

Posted by: Digizars     3/4/2011 6:45:28 AM
Comments Posted:1       

In simple, pull up s charging the input to supply. Pull down s discharging

Posted by: shravanxp     3/7/2005 6:28:25 AM
Comments Posted:12       

any Static-CMOS digital circuit has two parts "PULLUP" and "PULLDOWN";
"PULL UP" charges the o/p node to high
"PULL DOWN" discharges o/p node to low.
(u might know both r mutually exclusive for static-CMOS ckt)

u can make both the parts with any type of transistor(either NMOS or PMOS) , but which is better for each part.

use PMOS for PULLUP and NMOS for PULLDOWN (why??)

if u use NMOS for PULLUP then the o/p node will not get completely charged to Vdd, (same reasonin for why not PMOS for PULLDOWN)... ( what is this?? why is this happening?? comeon look at the "channel existency conditions" for each transistor)

Posted by: wrangler     2/22/2005 9:41:14 AM
Comments Posted:3       

in short a pull up device when energised will pull the ouput to supply and a pull down will do the reverse ie, pull the output to ground. any device can be used which performs this function.

Posted by: Venkateshr     2/18/2005 3:37:24 AM
Comments Posted:86       Questions Posted:1

Hi shantha,

        There is no pullup and pull down with reference to any device.In a generic way a device
facilitating the o/p to be high is PULLUP and low is
PULLDOWN. It could be a bjt or FET or MOSFET or
in common a transistor.

**********Usually PMOS  is used for PULLUP since
its Drain voltage is perfect HIGH i.e VDD and
NMOS is PULLDOWN since it can provide a perfect
LOW i.e 0***********

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