Pull Up transistor


Hi, What is the meaning of Pull up and pull down transistor with reference to PMOS and NMOS ?

Asked By: shantha_rang
On: Feb 17, 2005 3:19:50 PM

Comments(4)



In simple, pull up s charging the input to supply. Pull down s discharging
any Static-CMOS digital circuit has two parts "PULLUP" and "PULLDOWN"; "PULL UP" charges the o/p node to high "PULL DOWN" discharges o/p node to low. (u might know both r mutually exclusive for static-CMOS ckt) u can make both the parts with any type of transistor(either NMOS or PMOS) , but which is better for each part. use PMOS for PULLUP and NMOS for PULLDOWN (why??) if u use NMOS for PULLUP then the o/p node will not get completely charged to Vdd, (same reasonin for why not PMOS for PULLDOWN)... ( what is this?? why is this happening?? comeon look at the "channel existency conditions" for each transistor)
in short a pull up device when energised will pull the ouput to supply and a pull down will do the reverse ie, pull the output to ground. any device can be used which performs this function.
Hi shantha, &nbspThere is no pullup and pull down with reference to any device.In a generic way a device facilitating the o/p to be high is PULLUP and low is PULLDOWN. It could be a bjt or FET or MOSFET or in common a transistor. **********Usually PMOS &nbspis used for PULLUP since its Drain voltage is perfect HIGH i.e VDD and NMOS is PULLDOWN since it can provide a perfect LOW i.e 0***********
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