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<-- Previous Next -- > TOPIC: JK flip flop gate level verilog code
Posted by: saba426     7/8/2009 2:13:04 PM     Category: Verilog
Questions posted: 1         Comments Posted: 0
Hi,

can someone give me a gate level or RTL verilog code for JK flip flop? my outputs are always x.

thanx

Posted by: hawaiime     9/23/2009 9:36:32 PM
Comments Posted:3       Questions Posted:1

why don't you post your code here? It will be more easy for other to check what is wrong there.




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