Layout for NAND gate

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Posted by: sekhar 1/22/2005 11:57:38 PM Category: Semiconductors
Questions posted: 37 Comments Posted: 25

Can anyone let me know:

Q. How can we modify the layout of a three input NAND gate to occupy as little space as possible.

Posted by: gayitri_b 5/8/2009 8:55:11 PM
Comments Posted:1

let me see the layout of a simple nand gate

Posted by: jaggi 10/19/2005 6:49:03 PM
Comments Posted:3

Hi sekhar,

Did you mean to say how can we design a 3-input NAND gate layout with less/no diffusion breaks is it???
Please if you can eloborate your question then I can answer appropriately.

Jaggi

Posted by: jaggi 10/19/2005 6:48:11 PM
Comments Posted:3

Hi sekhar,

Did you mean to say how can we design a 3-input layout with less/no diffusion breaks is it???
Please if you can eloborate your question then I can answer appropriately.

Jaggi

Posted by: hwanswerman 1/24/2005 3:21:33 PM
Comments Posted:5

Use smaller feature sizes!

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