BIST


Hi, i'm new in this area. i've many journal and papers about BIST. my question that confius me is that at what level can we employ BIST? i've read that it can be implement at the logic and RT level of abstraction. is it any platform to deploy BIST? thanks in advance for your time to reply. airol.

Asked By: airol
On: Nov 1, 2006 7:53:21 AM

Comments(2)



thanks for the comment. how BIST is design? during design of the chips or otherwise? from my preliminary study, i found that it is considered during chip design process. thanks in advance, airol
· BIST (Build in self test) This module presents techniques that are used to detect the difficulties in digital IC’s and PC board system · The goal of testing is to apply a minimum set of input vectors to each device and to determine if it contains a defect. · The first step is to detect defects at the manufacturing level at the earliest point possible. · Testing for manufacturing defects incurs costs in the form of time during the design cycle (to generate the necessary test) and time during manufacturing (to actually apply the tests to the devices). However, the costs of letting a defective device be used in a system increase typically by an order of magnitude for each step in the process where the defect goes undetected. · Apply a set of test vectors to each device off the manufacturing line and compare outputs to the known good response. · The optimum test set will detect the greatest numbe of defects that can be present in a device with the least number of test vectors(High defect coverage) Hope it is lengthy but a lot of information Enjoy!!!!! santhosh
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